Stretched-Exponential 형태의 문턱전압 이동 모델의 SPICE구현

Implementation of Stretched-Exponential Time Dependence of Threshold Voltage Shift in SPICE

  • 정태호 (서울과학기술대학교 전자IT미디어공학과)
  • Jung, Taeho (Department of Electronic and IT Media Engineering, Seoul National University of Science and Technology)
  • 투고 : 2020.03.10
  • 심사 : 2020.03.23
  • 발행 : 2020.03.31


Threshold voltage shift occurring during operation is implemented in a SPICE simulation tool. Among the shift models the stretched-exponential function model, which is frequently observed from both single-crystal silicon and thin-film transistors regardless of the nature of causes, is selected, adapted to transient simulation, and added to BSIM4 developed by BSIM Research Group at the University of California, Berkeley. The adaptation method used in this research is to select degradation and recovery models based on the comparison between the gate and threshold voltages. The threshold voltage shift is extracted from SPICE transient simulation and shows the stretched-exponential time dependence for both degradation and recovery situations. The implementation method developed in this research is not limited to the stretched-exponential function model and BSIM model. The proposed method enables to perform transient simulation with threshold voltage shift in situ and will help to verify the reliability of a circuit.



연구 과제 주관 기관 : 서울과학기술대학교

이 연구는 서울과학기술대학교 교내연구비의 지원으로 수행되었습니다.


  1. E. Fortunato, P. Barquinha and R. Martins, "Oxide Semiconductor Thin‐Film Transistors: A Review of Recent Advances," Adv. Mater., 24(22), pp. 2945-2986, 2012.
  2. D. Nouguier, G. Ghibaudo, X. Federspiel, M. Rafik, and D. Roy, "New perspectives in defect centric model for NBTI reliability," Microelectron. Reliab., 98, pp. 119-123, 2019.
  3. X. Li, J. Qin, B. Huang, X. Zhang and J. B. Bernstein, "A new SPICE reliability simulation method for deep submicrometer CMOS VLSI circuits," IEEE T. DEVICE MAT. RE., 6(2), pp. 247-257, 2006.
  4. J. H. Stathis, S. Mahapatra and T. Grasser, "Controversial issues in negative bias temperature instability," Microelectron. Reliab., 81, pp. 244-251, 2018.
  5. N. Parihar, N. Goel, A. Chaudhary and S. Mahapatra, "A Modeling Framework for NBTI Degradation Under Dynamic Voltage and Frequency Scaling," IEEE T. ELECTRON. DEV., 63(3), pp. 946-953, 2016.
  6. D. Gupta, Seunghyup Yoo, Changhee Lee and Yongtaek Hong, "Electrical-Stress-Induced Threshold Voltage Instability in Solution-Processed ZnO Thin-Film Transistors: An Experimental and Simulation Study," IEEE T. ELECTRON. DEV., 58(7), pp. 1995-2002, 2011.
  7. S. Sambandan, Lei Zhu, D. Striakhilev, P. Servati and A. Nathan, "Markov model for threshold-voltage shift in amorphous silicon TFTs for variable gate bias," IEEE ELECTR. DEVICE L., 26(6), pp. 375-377, 2005.
  8. K. Giering, C. Sohrmann, G. Rzepa, L. Heis, T. Grasser and R. Jancke, "NBTI modeling in analog circuits and its application to long-term aging simulations," in 2014 IEEE INT. INTEG. REL. WRKSP., pp. 29-34, 2014.
  9. T. Jung, "Modeling of stretched-exponential and stretched-hyperbola time dependence of threshold voltage shift in thin-film transistors," J. Appl. Phys., 117(14), pp. 144501, 2015.
  10. M. A. Pinsky and S. Karlin, An Introduction to Stochastic Modeling. (4. ed. ed.) Amsterdam: Elsevier, 2011.
  11. G. Rzepa, J. Franco, B. O'Sullivan, A. Subirats, M. Simicic, G. Hellings, P. Weckx, M. Jech, T. Knobloch, M. Waltl, P. J. Roussel, D. Linten, B. Kaczer and T. Grasser, "Comphy - A compact-physics framework for unified modeling of BTI," Microelectron. Reliab., 85, pp. 49-65, 2018.
  12. S. G. J. Mathijssen, M. Colle, H. Gomes, E. C. P. Smits, B. Boer, I. Mcculloch, P. A. Bobbert, D. M. Leeuw and M. Colle, "Dynamics of threshold voltage shifts in organic and amorphous silicon field-effect transistors," Adv. Mater., 19(19), pp.2785-2789, 2007.
  13. The spice home page, Mar. 1, 2020, from
  14. BSIM Group, Mar. 1, 2020, from
  15. NGSPICE. Available:
  16. T. Jung, "Modeling of Reversible and Irreversible Threshold Voltage Shift in Thin-film Transistors," J. Korean Inst. Electr. Electron. Mater. Eng., 29(7), pp. 387-393, 2016.
  17. H. G. Nam, "Characterization of Active Pixel Switch Readout Circuit by SPICE Simulation," J. of KSDT, 6(2), pp.49-52, 2007.
  18. J. H. Park, J. K. Jeong, Y. J. Kim, J. B. Jun, and G. W. Lee, "Electrical Characteristic Analysis of IGZO TFT with Poly(4-vinylphenol) Gate Insulator according to Annealing Temperature," J. of KSDT, 16(1), pp. 97-101, 2017.