• Title/Summary/Keyword: Pin-driver

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Implementation of 880Mbps ATE Pin Driver using General Logic Driver (범용 로직 드라이버를 이용한 880Mbps ATE 핀 드라이버 구현)

  • Choi Byung-Sun;Kim Jun-Sung;Kim Jong-Won;Jang Young-Jo
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.1
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    • pp.33-38
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    • 2006
  • The ATE driver to test a high speed semiconductor chip is designed by using general logic drivers instead of dedicated pin drivers. We have proposed a structure of general logic drivers using FPCA and assured its correct operation by EDA tool simulation. PCB circuit was implemented and Altera FPGA chip was programmed using DDR I/O library. On the PCB, it is necessary to place two resistors connected output drivers near to the output pin to adjust an impedance matching. We confirmed that the measured results agree with the simulated values within 5% errors at room temperature for the input signals with 800Mbps data transfer rate and 1.8V operating voltage.

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ICT inspection System for Flexible PCB using Pin-driver and Ground Guarding Method (핀 드라이버와 접지가딩 기법을 적용한 모바일 디스플레이용 연성회로기판의 ICT검사 시스템)

  • Han, Joo-Dong;Choi, Kyung-Jin;Lee, Young-Hyun;Kim, Dong-Han
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.47 no.6
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    • pp.97-104
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    • 2010
  • In this paper, ICT (in circuit tester) inspection system and inspection algorithm is proposed and detects whether inferiority exists or not in the mounted device on the flexible PCB in cell phones or mobile display devices. The system is composed of PD (pin-driver) and GGM (ground guarding method). The structural characteristics of these flexible PCB are analyzed, which is needed to input or output the test signal. Test signal to investigate the characteristics of passive components is generated using modified circuit diagram and proposed inspection algorithm. PM (pin-map) is decided on the basis of circuit diagram and has the information about the kind of test signal to be applied and the pad number for the test signal to be connected. PD is designed to load a proper test signal for a specific pad and is adjusted according to PM so that the reconstructed circuit has minimum node and mash. The proposed ICT inspection system is realized using PD and GGM. Using the system, an experiment for each passive component is done to investigate the measurement accuracy of the developed system and an experiment for real flexible PCB model is done to verity the effectiveness of the system.

Development of a Pick-up Device for Plug-Seedlings (플러그묘 취출장치 개발)

  • 최원철;김대철;김경욱
    • Journal of Biosystems Engineering
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    • v.26 no.5
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    • pp.415-422
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    • 2001
  • A seedling pick-up device for vegetable transplanters was developed and its work performance was evaluated at the laboratory. The pick-up device extracts seedlings from a 200-cell tray of seedlings and transfers them to the place where they are to be transplanted into the soil. The device consists of a path generator, pick-up pins and a pin driver. The path generator is a five-bar mechanism comprised of a fixed link, a driving link, a driven link, a connecting link and a slider. The slider is constrained to move along the driven link and a fixed slot of combined straight-line and circular paths. The connecting link joins the driving link and the slider. When the slider moves along the straight-line path of the slot it takes seedlings out from the cell and transfers them to the transplanting hopper when moving along the circular path. A proto-type of the pick-up device was built and tested under the various operational conditions such as age of seedling, approach direction and penetration depth of pins to the cell, holding method of seedling and extracting velocity. The device extracted 30 seedlings per minute with the maximum success ratio of 97% using the seedlings of 23 days old. Some design details were also discussed and suggested to enhance the performance of the device.

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