Journal of Digital Contents Society (디지털콘텐츠학회 논문지)

Digital Contents Society (한국디지털콘텐츠학회)
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Testable Design of RF-ICs using BIST Technique

BIST 기법을 이용한 RF 집적회로의 테스트용이화 설계

  • 김용 (관동대학교 전자공학과) ;
  • 이재민 (관동대학교 전자공학과)
  • Received : 2012.01.10
  • Accepted : 2012.12.14
  • Published : 2012.12.31
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Abstract

In this paper, a new loopback BIST structure which is effective to test RF transceiver chip and LNA(Low Noise Amplifier) in the chip is presented. Because the presented BIST structure uses a baseband processor in the chip as a tester while the system is under testing mode, the developed test technique has an advantage of performing test application and test evaluation in effectiveness. The presented BIST structure can change high frequency test output signals to a low frequency signals which can make the CUT(circuits under test) tested easily. By using this technique, the necessity of RF test equipment can be mostly reduced. The test time and test cost of RF circuits can be cut down by using proposed BIST structure, and finally the total chip manufacturing costs can be reduced.

본 논문에서는 RF 송수신 시스템 칩 내부의 저잡음증폭기(LNA)와 전체 송수신기 시스템 테스트에 효과적인 새로운 루프백(Loopback) BIST 구조를 제안한다. 제안하는 테스트기법은 외부 테스트장비(Automatic Test Equipment)를 사용하는 기존의 테스트기법과 달리 테스트 모드에서 칩에 내장된 베이스밴드 프로세서를 테스터로 사용하므로써 테스트인가와 테스트평가등을 효율적으로 수행할 수 있는 장점을 갖는다. 높은 주파수의 테스트 출력신호는 낮은 주파수로 변환하여 베이스밴드 프로세서에서 평가하게 됨으로써 테스트용이도가 향상될 수 있다. 제안하는 테스트기법은 ATE와 같은 외부테스트장비의 필요를 최소화하고 테스트 시간과 비용을 줄여 결과적으로 칩 제조비용의 절감을 가능하게 해준다.

Keywords

References

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