Journal of electromagnetic engineering and science

The Korean Institute of Electromagnetic Engineering and Science (한국전자파학회)
권호 표지
DOI QR코드

DOI QR Code

Slew-Rate Enhanced Low-Dropout Regulator by Dynamic Current Biasing

  • Jeong, Nam Hwi (Department of Information and Telecommunication Engineering, Korea Aerospace University) ;
  • Cho, Choon Sik (Department of Information and Telecommunication Engineering, Korea Aerospace University)
  • Received : 2014.07.11
  • Accepted : 2014.10.24
  • Published : 2014.12.30
Download PDF
⟨ Previous Next ⟩

Abstract

We present a CMOS rail-to-rail class-AB amplifier using dynamic current biasing to improve the delay response of the error amplifier in a low-dropout (LDO) regulator, which is a building block for a wireless power transfer receiver. The response time of conventional error amplifiers deteriorates by slewing due to parasitic capacitance generated at the pass transistor of the LDO regulator. To enhance slewing, an error amplifier with dynamic current biasing was devised. The LDO regulator with the proposed error amplifier was fabricated in a $0.35-{\mu}m$ high-voltage BCDMOS process. We obtained an output voltage of 4 V with a range of input voltages between 4.7 V and 7 V and an output current of up to 212 mA. The settling time during line transient was measured as $9{\mu}s$ for an input variation of 4.7-6 V. In addition, an output capacitor of 100 pF was realized on chip integration.

Keywords

References

  1. G. A. Rincon-Mora and P. E. Allen, "Optimized frequency-shaping circuit topologies for LDO's," IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 45, no. 6, pp. 703-708, Jun. 1998. https://doi.org/10.1109/82.686689
  2. K. N. Leung, and P. K. T. Mok, "A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation," IEEE Journal of Solid-State Circuits, vol. 38, no. 10, pp. 1691-1702, Oct. 2003. https://doi.org/10.1109/JSSC.2003.817256
  3. R. J. Milliken, J. Silva-Martinez, and E. Sanchez-Sinencio, "Full on-chip CMOS low-dropout voltage regulator," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 54, no. 9, pp. 1879-1890, Sep. 2007. https://doi.org/10.1109/TCSI.2007.902615
  4. W. J. Huang, S. H. Lu, and S. I. Liu, "A capacitor-free CMOS low dropout regulator with slew rate enhancement," in Proceedings of the International Symposium on VLSI Design, Automation and Test, Hsinchu, China, 2006, pp. 1-4.
  5. C. M. Chen and C. C. Hung, "A capacitor-free CMOS low-dropout voltage regulator," in Proceedings of the International Symposium on Circuits and Systems (ISCAS2009), Taipei, Taiwan, 2009, pp. 2525-2528.
  6. X. Liu, S. Wang, S. Guo, and Y. Chang, "Design of offchip capacitor-free CMOS low-dropout voltage regulator," in Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems (APCCAS2008), Macao, China, 2008, pp. 1316-1319.
  7. E. N. Y. Ho and P. K. T. Mok, "A capacitor-less CMOS active feedback low-dropout regulator with slew-rate enhancement for portable on-chip application," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 57, no. 2, pp. 80-84, Feb. 2010. https://doi.org/10.1109/TCSII.2009.2038630
  8. R. Hogervorst, J. P. Tero, R. G. H. Eschauzier, and J. H. Huijsing, "A compact power-efficient 3 V CMOS rail-torail input/output operational amplifier for VLSI cell libraries," IEEE Journal of Solid-State Circuits, vol. 29, no. 12, pp. 1505-1513, Dec. 1994. https://doi.org/10.1109/4.340424
  9. J. Y. Choi, K. Y. Min, and C. S. Yoo, "High-speed and low-power analog source driver for TFT-LCD using dynamic current biased operational amplifier," SID Symposium Digest of Technical Papers, vol. 38, no. 1, pp. 1647-1650, May 2007.
  10. C. Lovaraju, A. Maity, and A. Patra, "A capacitor-less low drop-out (LDO) regulator with improved transient response for system-on-chip applications," in Proceedings of the 26th International Conference on VLSI Design and the 12th International Conference on Embedded Systems, Pune, India, 2013, pp. 130-135.