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Lowering Error Floor of LDPC Codes Using an Improved Parallel WBF Algorithm

  • Ma, Kexiang (State Key Laboratory of Integrated Service Networks, Xidian University) ;
  • Li, Yongzhao (State Key Laboratory of Integrated Service Networks, Xidian University) ;
  • Zhu, Caizhi (State Key Laboratory of Integrated Service Networks, Xidian University) ;
  • Zhang, Hailin (State Key Laboratory of Integrated Service Networks, Xidian University) ;
  • Zhang, Yuming (State Key Laboratory of Integrated Service Networks, Xidian University)
  • Received : 2013.01.29
  • Accepted : 2013.03.05
  • Published : 2014.02.01
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Abstract

In weighted bit-flipping-based algorithms for low-density parity-check (LDPC) codes, due to the existence of overconfident incorrectly received bits, the metric values of the corresponding bits will always be wrong in the decoding process. Since these bits cannot be flipped, decoding failure results. To solve this problem, an improved parallel weighted bit flipping algorithm is proposed. Specifically, a reliability-saturation strategy is adopted to increase the flipping probability of the overconfident incorrectly received bits. Simulation results show that the error floor of LDPC codes is greatly lowered.

Keywords

References

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