반도체디스플레이기술학회지 (Journal of the Semiconductor & Display Technology)

한국반도체디스플레이기술학회 (The Korean Society Of Semiconductor & Display Technology)
권호 표지

자기진단과 시계 기능을 갖는 비동기용 불휘발성 메모리 모듈의 설계

Design of Asynchronous Nonvolatile Memory Module with Self-diagnosis and Clock Function

  • 신우현 (청주대학교 반도체공학과) ;
  • 이강원 (청주대학교 반도체공학과) ;
  • 양오 (청주대학교 반도체공학과)
  • Woohyeon Shin (Semiconductor Engineering of Cheongju University) ;
  • Kang Won Lee (Semiconductor Engineering of Cheongju University) ;
  • Oh Yang (Semiconductor Engineering of Cheongju University)
  • 투고 : 2023.02.24
  • 심사 : 2023.03.22
  • 발행 : 2023.03.31
PDF 다운로드
⟨ 이전 논문 다음 논문 ⟩

초록

This paper discusses the design of 32Mbyte asynchronous nonvolatile memory modules, which includes self-diagnosis and RTC (Real Time Clock) functions to enhance their data stability and reliability. Nonvolatile memory modules can maintain data even in a power-off state, thereby improving the stability and reliability of a system or device. However, due to the possibility of data error due to electrical or physical reasons, additional data loss prevention methods are required. To minimize data error in asynchronous nonvolatile memory modules, this paper proposes the use of voltage monitoring circuits, self-diagnosis, BBT (Bad Block Table), ECC (Error Correction Code), CRC (Cyclic Redundancy Check)32, and data check sum, data recording method using RTC. Prototypes have been produced to confirm correct operation and suggest the possibility of commercialization.

키워드

과제정보

본 연구는 2023년도 청주대학교 연구장학과 중소기업기술정보진흥원의 "산학연 Collabo R&D연구 사업(R&D, S3104570)" 및 정부(산업통상자원부)의 재원으로 한국산업기술진흥원의 "2023년 산업혁신인재성장지원사업(P0017011)" 지원을 받아 수행된 연구 결과입니다.

참고문헌

  1. Tae-Hwan Kim, Hoon Chang, "PMBIST for NAND Flash Memory Pattern Test", Journal of The Institute of Electronics and Information Engineers Vol. 51, No. 1, pp.79-89, 2014. https://doi.org/10.5573/ieie.2014.51.1.079
  2. Yang, Hee Hun, Sung, Jae Young, Lee, Hwee Yeon, Jeong, Jun Kyo, Lee, Ga won, "Study on the Activation Energy of Charge Migration for 3D NAND Flash Memory Application", Journal of Semiconductor & Display Technology Vol. 18, No. 2, pp. 82-86, 2019.
  3. Kui-Yon Lee, "CCI Error Correction to Correct Bit-line Applied Voltage for MLC NAND Flash Memories", The Journal of Korean Institute of Information Technology Vol. 12, No. 11, pp. 23-29, 2014. https://doi.org/10.14801/kitr.2014.12.11.23
  4. Doo-Hwan Kim, Sang-Jin Lee, Ki-Hun Nam, Shi-Ho Kim, Kyoung-Rok Cho, "An Equalizing Algorithm for Cell-to-Cell Interference Reduction in MLC NAND Flash Memory", The transactions of The Korean Institute of Electrical Engineers Vol. 59, No. 6, pp. 1095-1102, 2010.
  5. Jisu Kwon, Daejin Park, "Acceleration of ECC Computation for Robust Massive Data Reception under GPU-based Embedded Systems", Journal of the Korea Institute of Information and Communication Engineering Vol.24, No.7, pp.956-962, 2020.
  6. Tae Hyun Kim, Oh Yang, and Jun Sang Yeon, "Design of Asynchronous Non-Volatile Memory Module using NAND Flash Memory and PSRAM", Journal of Semiconductor & Display Technology Vol.19, No.3, pp.112-117, 2020.
  7. Kim, Myeong Kyun, Yang, Oh, Chung, Won Sup, "Implementation of the FAT32 File System using PLC and CF Memory", Journal of Semiconductor & Display Technology Vol. 11, No. 2, pp. 85-91, 2012.
  8. CY14V116F7/CY14V116G7, 16-Mbit nvSRAM with Asynchronous NAND interface.pdf
  9. Woohyeon Shin, Oh Yang, and Jun Sang Yeon, "Design of Asynchronous Nonvolatile Memory Module using Self-diagnosis Function", Journal of Semiconductor & Display Technology Vol.21, No.1, pp.85-90, 2022.
  10. www.st.com/resource/en/datasheet/stm32h750ib.pdf
  11. Reference manual - stm32h750.pdf