• Title/Summary/Keyword: Reconfiguration

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Reconfiguration Problems in VLSI and WSI Cellular Arrays (초대규모 집적 또는 웨이퍼 규모 집적을 이용한 셀룰러 병렬 처리기의 재구현)

  • 한재일
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.10
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    • pp.1553-1571
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    • 1993
  • A significant amount of research has focused on the development of highly parallel architectures to obtain far more computational power than conventional computer systems. These architectures usually comprise of a large number of processors communicating through an interconnection network. The VLSI (Very Large Scale Integration) and WSI (Wafer Scale Integration) cellular arrays form one important class of those parallel architectures, and consist of a large number of simple processing cells, all on a single chip or wafer, each interconnected only to its neighbors. This paper studies three fundamental issues in these arrays : fault-tolerant reconfiguration. functional reconfiguration, and their integration. The paper examines conventional techniques, and gives an in-depth discussion about fault-tolerant reconfiguration and functional reconfiguration, presenting testing control strategy, configuration control strategy, steps required f4r each reconfiguration, and other relevant topics. The issue of integrating fault tolerant reconfiguration and functional reconfiguration has been addressed only recently. To tackle that problem, the paper identifies the relation between fault tolerant reconfiguration and functional reconfiguration, and discusses appropriate testing and configuration control strategy for integrated reconfiguration on VLSI and WSI cellular arrays.

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Distribution System Reconfiguration Considering Customer and DG Reliability Cost

  • Cho, Sung-Min;Shin, Hee-Sang;Park, Jin-Hyun;Kim, Jae-Chul
    • Journal of Electrical Engineering and Technology
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    • v.7 no.4
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    • pp.486-492
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    • 2012
  • This paper presents a novel objective function for distribution system reconfiguration for reliability enhancement. When islanding operations of distributed generators is prohibited, faults in the feeder interrupt the operation of distributed generators. For this reason, we include the customer interruption cost as well as the distributed generator interruption cost in the objective function in the network reconfiguration algorithm. The network reconfiguration in which genetic algorithms are used is implemented by MATLAB. The effect of the proposed objective function in the network reconfiguration is analyzed and compared with existing objective functions through case studies. The network reconfiguration considering the proposed objective function is suitable for a distribution system that has a high penetration of distributed generators.

Improvement of reconfiguration rate using pseudo faulty processing elements on the single track 2-D systolic array (의사결함처리요소를 이용한 단일트랙 이차원 시스토릭 어레이에서 재구성율의 향상)

  • 신동석;우종호
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.2
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    • pp.163-172
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    • 1996
  • In reconfiguration of systolic arrays, a potential disadvantage is that in the PRESENCE of consective faulty PE's logically connected PE's may be far apart, requiring the reduction of clock speed and thus reducing throughput of the array. Thus it is fundamental tokeep locality of interconnections as high as possible even after reconfiguration and to make reconfiguration implemented in the simple routing devices. However requirements of locality and simplicity mean that reconfiguring capability is limited. This paper deals iwth the issue of developing efficient method for reconfiguration of 2-D systolic arrays which can be achieved high reconfiguration rate, with the two conditions satisfying using concept of pseudo faulty processing element. Applying this concept to reconfiguration of systolic array, we have found similar condition. The simulation shows that recomfiguration rates are 97%, 84% when N faults ocurs on the N$\times$N array n case of N=5, 8 respectively.

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Analysis on Flight Test Results of Reconfiguration Flight Control System (재형상 비행제어 시스템의 비행시험 결과 분석)

  • Min, Byoung-Mun;Kim, Seong-Pil;Kim, Bong-Ju;Kim, Eung-Tai;Tahk, Min-Jea
    • Journal of Institute of Control, Robotics and Systems
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    • v.14 no.12
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    • pp.1244-1252
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    • 2008
  • This paper presents the analysis results obtained by the flight test of reconfiguration flight control system for an aircraft. The reconfiguration flight control system was designed by using control allocation scheme that automatically distributes the demanded control moments determined by control law to each actual control surface. In this paper, some control allocation algorithms for reconfiguration control of general aircraft with redundant control surfaces are summarized and their performance evaluation results through nonlinear simulation and Hardware-In-the-Loop-Simulation (HILS) test are shown. Also, Unmanned Aerial Vehicle (UAV) system adopted as a platform for the flight test of reconfiguration flight controller and the implementation procedure of reconfiguration flight controller into real-time UAV system were introduced. Finally, flight test results were analyzed.

A Reconfiguration Technique of Logical Topology in a Ship Backbone Network (선박 백본 네트워크의 논리 토폴로지 재구성 기법)

  • Tak, Sung-Woo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.5
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    • pp.922-931
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    • 2012
  • This paper studies a series of logical topology reconfiguration processes corresponding to a series of traffic demand changes in a ship backbone network. The proposed reconfiguration technique is to minimize costly changes of traffic forwarding paths and minimize the average hop distance of traffic forwarding paths in terms of ship backbone network performance simultaneously. Performance evaluation is conducted to illustrate the efficiency of the proposed reconfiguration technique. It shows that the proposed reconfiguration technique yields efficient performance in the entire series of reconfiguration processes.

Traffic Prediction based Multi-Stage Virtual Topology Reconfiguration Policy in Multi-wavelength Routed Optical Networks (다중 파장 광 네트워크 상에서 트래픽 예상 기법 기반 다단계 가상망 재구성 정책)

  • Lin Zhang;Lee, Kyung-hee;Youn, Chan-Hyun;Shim, Eun-Bo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.8C
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    • pp.729-740
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    • 2002
  • This paper studies the issues arising in the virtual topology reconfiguration phase of Multi-wavelength Routed Optical Networks. This reconfiguration process means to change the virtual topology in response to the changing traffic patterns in the higher layer. We formulate the optimal reconfiguration policy as a multi-stage decision-making problem to maximize the expected reward and cost function over an infinite horizon. Then we propose a new heuristic algorithm based on node-exchange to reconfigure the virtual topology to meet the traffic requirement. To counter the continual approximation problem brought by heuristic approach, we take the traffic prediction into consideration. We further propose a new heuristic reconfiguration algorithm called Prediction based Multi-stage Reconfiguration approach to realize the optimal reconfiguration policy based on predicted traffic. Simulation results show that our reconfiguration policy significantly outperforms the conventional one, while the required physical resources are limited.

Reliability improvement and real-tiem reconfiguration of fault tolerant VLSI arrays using symmetrical pseudo faulty processing elements genration technique (대칭적 의사결함처리요소 생성 기법에 의한 결함허용 VLSI 어레이의 신뢰도 향상과 실시간 재구성)

  • 신동석;우종호
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.5
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    • pp.188-202
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    • 1996
  • In this paper, we propose a symmetrical pseudo faulty processing elements genration technique to improve the overall reliability of arrays with fixed hardware resources on the fault tolerant VLSI arrays based on single-track switches. We have analyzed the reliability of fault tolerant VLSI arrays and designed control logic for real-tiem reconfiguration. Applying this technique to reconfiguration of VLSI 2-D arrays, we have found that the proposed scheme achieves a higher reliability than the previus methods of similar condition. And we have found that the results of reliability analyzed by mathematic computation are very close to simulated ones. Furthermore, the time overhead for reconfiguration is independent of the array size because the control for reconfiguration is distributively executed by each processing elements. And the proposed scheme has an advantage which maintained properties of VLSI arrays by keeping the locality of interconnections as high as possible even after the reconfiguration.

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Reconfiguration of Redundant Thrusters by Allocation Method

  • Jin, Jae-Hyun;Tahk, Min-Jea
    • International Journal of Aeronautical and Space Sciences
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    • v.6 no.2
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    • pp.76-83
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    • 2005
  • Thrusters are important actuators where air is rare. Since the maintenance or replacement of thrusters is not easy in such an environment, a thrusting system must be highly reliable. Redundant thrusters are used to meet the reliability requirement. In this paper, a reconfiguration problem for those redundant thrusters is discussed, especially the management or distribution logic of redundant thrusters is focused on. The logic has to be changed if faults occur at thrusters. Reconfiguration is to change the distribution logic to accommodate thrusters' faults. The authors propose a reconfiguration algorithm based on the linear programming method. The authors define the reconfiguration problem as an optimization problem. The performance index is a quantity related with total fuel consumption by thrusters. This algorithm can accommodate multiple faults. Numerical examples are given to show the advantage of the proposed algorithm over existing methods.

A Shared Buffer-Constrained Topology Reconfiguration Scheme in Wavelength Routed Networks

  • Youn, Chan-Hyun;Song, Hye-Won;Keum, Ji-Eun
    • ETRI Journal
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    • v.27 no.6
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    • pp.725-732
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    • 2005
  • The reconfiguration management scheme changes a logical topology in response to changing traffic patterns in the higher layer of a network or the congestion level on the logical topology. In this paper, we formulate a reconfiguration scheme with a shared buffer-constrained cost model based on required quality-of-service (QoS) constraints, reconfiguration penalty cost, and buffer gain cost through traffic aggregation. The proposed scheme maximizes the derived expected reward-cost function as well as guarantees the required flow's QoS. Simulation results show that our reconfiguration scheme significantly outperforms the conventional one, while the required physical resources are limited.

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Active Distribution Network Expansion Planning Considering Distributed Generation Integration and Network Reconfiguration

  • Xing, Haijun;Hong, Shaoyun;Sun, Xin
    • Journal of Electrical Engineering and Technology
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    • v.13 no.2
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    • pp.540-549
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    • 2018
  • This paper proposes the method of active distribution network expansion planning considering distributed generation integration and distribution network reconfiguration. The distribution network reconfiguration is taken as the expansion planning alternative with zero investment cost of the branches. During the process of the reconfiguration in expansion planning, all the branches are taken as the alternative branches. The objective is to minimize the total costs of the distribution network in the planning period. The expansion alternatives such as active management, new lines, new substations, substation expansion and Distributed Generation (DG) installation are considered. Distribution network reconfiguration is a complex mixed-integer nonlinear programming problem, with integration of DGs and active managements, the active distribution network expansion planning considering distribution network reconfiguration becomes much more complex. This paper converts the dual-level expansion model to Second-Order Cone Programming (SOCP) model, which can be solved with commercial solver GUROBI. The proposed model and method are tested on the modified IEEE 33-bus system and Portugal 54-bus system.