• Title/Summary/Keyword: Simulation Annealing

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A Study on Reliability-driven Device Placement Using Simulated Annealing Algorithm (시뮬레이티드 어닐링을 이용한 신뢰도 최적 소자배치 연구)

  • Kim, Joo-Nyun;Kim, Bo-Gwan
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.5
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    • pp.42-49
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    • 2007
  • This paper introduces a study on reliability-driven device placement using simulated annealing algorithm which can be applicable to MCM or electronic systems embedded in a spacecraft running at thermal conduction environment. Reliability of the unit's has been predicted with the devices' junction temperatures calculated from FDM solver and optimized by simulated annealing algorithm. Simulated annealing in this paper adopts swapping devices method as a perturbation. This paper describes and compares the optimization simulation results with respect to two objective functions: minimization of failure rate and minimization of average junction temperature. Annealing temperature variation simulation case and equilibrium coefficient variation simulation case are also presented at the two respective objective functions. This paper proposes a new approach for reliability optimization of MCM and electronic systems considering those simulation results.

Application of the Annealing Method to the Three Dimensional Layout Design (3차원배치설계에 대한 어닐링법의 적용)

  • 장승호;최명진
    • Journal of the Korea Society for Simulation
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    • v.10 no.2
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    • pp.1-14
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    • 2001
  • The layout design of component plays an important role in the design and usability of many engineering products. The Engineering artifacts of today are becoming increasingly complicated. The simulated annealing method has been applied effectively to the layout and packing problems of wafer. The main characteristics of simulated annealing method is that an optimum can be obtained from the many local optimums by controlling the temperature and introducing the statistic flickering. The objective of this study is to suggest a method to apply the simulated annealing method to the three dimensional layout design of submergible boat which has multiple constraint conditions and evaluation criteria. We describe an approach to define cost function, constraints and generate layouts using a computer. In this research three dimensional LAYout Design Optimization Program(LAYDOP ver.2) has been developed. The layout result(the total value of evaluation criteria) designed by a human layout expert has been improved by 31.0% using this program.

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Optimization Using Gnetic Algorithms and Simulated Annealing (유전자 기법과 시뮬레이티드 어닐링을 이용한 최적화)

  • Park, Jung-Sun;Ryu, Mi-Ran
    • Proceedings of the KSME Conference
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    • 2001.06a
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    • pp.939-944
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    • 2001
  • Genetic algorithm is modelled on natural evolution and simulated annealing is based on the simulation of thermal annealing. Both genetic algorithm and simulated annealing are stochastic method. So they can find global optimum values. For compare efficiency of SA and GA's, some function value was maximized. In the result, that was a little better than GA's.

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An Enhanced Simulated Annealing Algorithm for Rural Postman Problems (Rural Postman Problem 해법을 위한 향상된 Simulated Annealing 알고리즘)

  • 강명주
    • Journal of the Korea Society of Computer and Information
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    • v.6 no.1
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    • pp.25-30
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    • 2001
  • This paper proposes an enhanced Simulated Annealing(SA) algorithm for Rural Postman Problems(RPPs). In SA, the cooling schedule is an important factor for SA algorithms. Hence, in this paper a cooling schedule is proposed for SA for RPPs. In the simulation. the results of the SA using the proposed cooling schedule and the results of the SA using the existing cooling schedules are compared and analyzed. In the simulation results, the proposed method obtained the better results than the existing methods.

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A Study of defect distribution and profiles of MeV implanted phosphorus in silicon (실리콘에 MaV로 이온주입된 인의 결함분포와 profile에 관한 연구)

  • 정원채
    • Electrical & Electronic Materials
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    • v.10 no.9
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    • pp.881-888
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    • 1997
  • This study demonstrats the profiles of phosphorus ions in silicon by MeV implantation(1∼3 MeV). Implanted profiles could be measured by SIMS(Cameca 4f) and compared with simulation results(TRIM program and analytical description method only using on Pearson function). The experimental result in the peak concentration region has a little bit deviation from simulation data. By RBS and Channeling measurements the defect distribution of implanted samples could be measured and spectrum are calibrated depth with RUMP simulation By XTEM measurement the thickness of defect zone also could be measured. Finally thermal annealing for the electrical activation of implanted ions carried out by RTA(rapid thermal annealing). The concentration-depth profiles after heat treatment was measured by SR(spreading resistance)-method.

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A Study on Simulated Annealing Algorithm in Flowshop Scheduling (Flowshop 일정계획을 위한 Simulated Annealing 알고리듬 이용)

  • 우훈식;임동순;김철한
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.21 no.45
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    • pp.25-32
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    • 1998
  • A modified simulated annealing algorithm is proposed and applied to the permutation flowshop scheduling with the makespan objective. Based on the job deletion and insertion method, a newly defined Max-min perturbation scheme is proposed to obtain a better candidate solution in the simulated annealing process. The simulation experiments are conducted to evaluate the effectiveness of the proposed algorithm against the existing heuristics and results are reported.

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A SIMULATION/OPTIMIZATION ALGORITHM FOR AN FMS DISPATCHING PRIORITY PROBLEM

  • Lee, Keun-Hyung;Morito, Susumu
    • Proceedings of the Korea Society for Simulation Conference
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    • 1993.10a
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    • pp.16-16
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    • 1993
  • The efficient use of capital intensive FMS requires determination of effective dispatching priority with which the parts of the selected part types are to be inputed into the system. This paper presents a simulation-optimization approach to find an appropriate dispatching priority. The study is based on a detailed simulator for a module-type commercial FMS, Specifically, after presenting the basic configuration and fundamental control logic of the system together with its main characteristics as a special type of a job shop, an algorithm is presented which combines simulated annealing and simulation to explore a dispatching priority of operations that minimizes the total tardiness, Computational performance of the algorithm shows that good solutions can be obtained within a reasonable amount of computations. The paper also compares the performance of the "optimal" or near optimal dispatching priority generated by the proposed algorithm with those generated by standard dispatching rules such as SPT, EDD and SLACK.

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Variance Reductin via Adaptive Control Variates(ACV) (Variance Reduction via Adaptive Control Variates (ACV))

  • Lee, Jae-Yeong
    • Journal of the Korea Society for Simulation
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    • v.5 no.1
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    • pp.91-106
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    • 1996
  • Control Variate (CV) is very useful technique for variance reduction in a wide class of queueing network simulations. However, the loss in variance reduction caused by the estimation of the optimum control coefficients is an increasing function of the number of control variables. Therefore, in some situations, it is required to select an optimal set of control variables to maximize the variance reduction . In this paper, we develop the Adaptive Control Variates (ACV) method which selects an optimal set of control variates during the simulation adatively. ACV is useful to maximize the simulation efficiency when we need iterated simulations to find an optimal solution. One such an example is the Simulated Annealing (SA) because, in SA algorithm, we have to repeat in calculating the objective function values at each temperature, The ACV can also be applied to the queueing network optimization problems to find an optimal input parameters (such as service rates) to maximize the throughput rate with a certain cost constraint.

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Design of CNN Chip with annealing Capability (어닐링 기능을 갖는 CNN칩 설계)

  • 류성환;박병일정금섭전흥우
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.1041-1044
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    • 1998
  • In this paper the cellular neural networks with annealing capability is designed. The annealing capability helps the networks escape from the local-minimum points and quickly search for the global-minimum point. A 6$\times$6 CNN chip is designed using a $0.8\mu\textrm{m}$ CMOS technology, and the chip area is 2.89mm$\times$2.89mm. The simulation results for hole filling image processing show that the general CNN has a local-minimum problem, but the annealed CNN finds the global-minimum solutions very efficiently.

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A Penalized Principal Component Analysis using Simulated Annealing

  • Park, Chongsun;Moon, Jong Hoon
    • Communications for Statistical Applications and Methods
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    • v.10 no.3
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    • pp.1025-1036
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    • 2003
  • Variable selection algorithm for principal component analysis using penalty function is proposed. We use the fact that usual principal component problem can be expressed as a maximization problem with appropriate constraints and we will add penalty function to this maximization problem. Simulated annealing algorithm is used in searching for optimal solutions with penalty functions. Comparisons between several well-known penalty functions through simulation reveals that the HARD penalty function should be suggested as the best one in several aspects. Illustrations with real and simulated examples are provided.